1. Field of the Invention
This invention relates to the field of data processors and more specifically to data processors employing a plurality of peripheral units connected by means of data buses and private lines to a selection controller.
2. Description of the Prior Art
Data processor technology has advanced in recent years to the point that in some instances the inherent propagation delay in the transfer of information from two physical points consumes a substantial portion of the time available for data processing. It has, therefore, become necessary to minimize such propagation delays or, at least, to minimize the ill effects of such delays. The method most used in the past to minimize delay has been to minimize the physical separation of communicating components of a digital system. However, the minimization of the physical separation of communicating components is constrained by many factors and, at some point in such minimization, a practical limit is reached. At that point, actual propagation delay can be minimized no further and methods must be sought to minimize the ill effects of the residual propagation delay.
The problem of propagation delay is especially significant in systems employing a plurality of peripheral units connected by a peripheral bus to a means of peripheral unit selection. The communication efficiency of the entire peripheral unit community may be limited by the physical propagation delays. In such a system, it is necessary to select the peripheral unit to use the peripheral bus for a particular interval of time in the most efficient manner for minimizing the effect of the propagation delay. More specifically, the interchange of request and control signals required for the selection of a particular one of the many peripheral units to use the peripheral unit bus must either be minimized or advantageously interleaved with data transfer. This is particularly true in a system in which it is possible that a peripheral unit, once having been selected to use the peripheral bus, may be preempted from its communication function by, for example, a conflict with the needs of the central processor.
Several systems have been developed which effectively minimize the deleterious effects of propagation delays on the efficiency of a peripheral unit community by advantageous use of control signals. However, such prior systems have not minimized these deleterious effects when the possibility of peripheral unit preemption is considered. More specifically, such systems have not been capable of minimizing the deleterious effects of propagation delays on a peripheral bus in the situation where a peripheral unit selected to use the peripheral bus actually uses it to transfer data and also in the situation where a peripheral unit selected to use the peripheral bus is not permitted to complete its data transfer operation.